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Microcode

Read: http://inertiawar.com/microcode/



Pentium 4

In most cases, the decoder generates 1 - 4 µops for each instruction. For complex instructions that require more than 4 µops, the µops are submitted from microcode ROM. 

The tables in manual 4: "Instruction tables" list the number of decoder µops and microcode 
µops that each instruction generates. 

The decoder can handle instructions at a maximum rate of one instruction per clock cycle. There are a few cases where the decoding of an instruction takes more than one clock cycle: 

An instruction that generates micro-code may take more than one clock cycle to decode, sometimes much more. The following instructions, which may in some cases generate micro-code, do not take significantly more time to decode: moves to and from segment registers, ADC, SBB, IMUL, MUL, MOVDQU, MOVUPS, MOVUPD. Instructions with many prefixes take extra time to decode.

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